The present invention relates to a semiconductor device and a method for fabricating the same, especially to a semiconductor device which is used as a switching power supply device and serves as a high-voltage semiconductor switching element for repeatedly opening and closing flow of a principal current and a method for fabricating the same.
Switching elements, such as high-voltage MOS (metal-oxide-semiconductor) transistors for switching ON/OFF of a current, are widely used in power semiconductor devices for power conversion equipment and power control equipment. However, insulator gate bipolar transistors (hereinafter abbreviated as “IGBT”) having a function of conductivity modulation are more suitable for the high-power use because of the necessity of a small voltage drop at the time of turn-on in order to reduce as much power loss as possible.
The structure and operation of a lateral IGBT is hereinafter described as an example of prior art (see, for example, Proceedings of the 19th International Symposium on Power Semiconductor Devices & ICs, pp. 225-228, May 2007).
FIG. 17 is an example of prior art, showing a cross sectional structure of a lateral IGBT formed on a semiconductor substrate having a thickness of 170 μm.
As shown in FIG. 17, an N-type RESURF region 202 exists in an upper portion of a semiconductor substrate 201 of P-type silicon (Si), and a P-type base region 204 is provided adjacent to the N-type RESURF region 202. An N-type emitter/source region 205 having an impurity concentration higher than that of the RESURF region 202 is provided in an inner upper portion of the base region 204. A P-type contact region 208 having an impurity concentration higher than that of the base region 204 is also provided in the inner portion of the base region 204 so as to be adjacent to the emitter/source region 205. A polysilicon gate electrode 207 lies above the emitter/source region 205, the base region 204, and part of the RESURF region 202. A gate insulating film 206 is interposed between the gate electrode 207 and said regions 205, 204 and 202. A P-type collector region 211 is provided in an upper portion of the RESURF region 202 so as to be apart from the base region 204.
In the conventional lateral IGBT, the thickness of the semiconductor substrate 201 is reduced to 170 μm to lower resistance of the semiconductor substrate 201 in the thickness direction, thereby increasing the number of carriers flowing to a back side electrode at the time of turn-off. By doing so, reduction (speed-up) of turn-off time is attempted without having lattice defect which controls lifetime of the carriers in the semiconductor substrate 201.
However, in the above conventional semiconductor device, the reduction in thickness of the semiconductor substrate 201 greatly decreases the strength of the semiconductor substrate 201, and therefore, a crack may occur in the semiconductor substrate 201 during the step of, for example, forming a metal film, which serves as a back side electrode, on a surface of the semiconductor substrate 201 opposite to the gate electrode 207. To avoid this, a special transfer system or technique is necessary. Besides, punch-through voltage between the RESURF region 202 and the back side electrode is decided by the thickness of the semiconductor substrate 201, and therefore, reduction in thickness of the semiconductor substrate 201 causes a decrease in possible drain breakdown voltage. In addition, reduction in thickness of the semiconductor substrate 201 leads to an increase in resistance of the semiconductor substrate in a lateral direction. As a result, on-resistance of the IGBT increases.